1. Field of the Invention
The invention relates to a method for fabricating semiconductor device, and more particularly, to a method of conducting two thermal processes for forming silicide after forming contact holes.
2. Description of the Prior Art
Field effect transistors are important electronic devices in the fabrication of integrated circuits, and as the size of the semiconductor device becomes smaller and smaller, the fabrication of the transistors also improves and is constantly enhanced for fabricating transistors with smaller sizes and higher quality.
In the conventional method of fabricating transistors, a gate structure is first formed on a substrate, and a lightly doped drain (LDD) is formed on the two corresponding sides of the gate structure. Next, a spacer is formed on the sidewall of the gate structure and an ion implantation process is performed to forma source/drain region within the substrate by utilizing the gate structure and spacer as a mask. In order to incorporate the gate, source, and drain into the circuit, contact plugs are often utilized for interconnection purposes, in which the contact plugs are composed of conducting metals such as tungsten and copper. Nevertheless, the interconnection between the contact plugs and the silicon material of the gate structure and the source/drain region is usually poor, hence a silicide material is often formed over the surface of the gate structure and the source/drain region to improve the ohmic contact between the contact plugs and the gate structure and the source/drain region.
Nevertheless, current approach for forming silicide still encounters numerous problems. Hence, how to improve the current fabrication process while increasing the performance of the device has become an important task in this field.